summaryrefslogtreecommitdiff
path: root/include/internal/database
diff options
context:
space:
mode:
authorCedric Nugteren <web@cedricnugteren.nl>2016-02-28 16:31:31 +0100
committerCedric Nugteren <web@cedricnugteren.nl>2016-02-28 16:31:31 +0100
commit610a31283bd6400b0f077941cea429d3caa6021c (patch)
treef486707b998148a8f3d52c0c5d701a02216f45a9 /include/internal/database
parentc457a70aa13d5a1bf20996f82f3684786d27581d (diff)
parent4a56822dcc7f723db0dc9a86fbb71abdd18cee31 (diff)
Merge branch 'ger_routines' into development
Diffstat (limited to 'include/internal/database')
-rw-r--r--include/internal/database/xger.h88
1 files changed, 88 insertions, 0 deletions
diff --git a/include/internal/database/xger.h b/include/internal/database/xger.h
new file mode 100644
index 00000000..c9cfb6cd
--- /dev/null
+++ b/include/internal/database/xger.h
@@ -0,0 +1,88 @@
+
+// =================================================================================================
+// This file is part of the CLBlast project. The project is licensed under Apache Version 2.0. This
+// project loosely follows the Google C++ styleguide and uses a tab-size of two spaces and a max-
+// width of 100 characters per line.
+//
+// Author(s):
+// Database generator <database.py>
+//
+// This file populates the database with best-found tuning parameters for the 'Xger' kernels.
+//
+// =================================================================================================
+
+namespace clblast {
+// =================================================================================================
+
+const Database::DatabaseEntry Database::XgerSingle = {
+ "Xger", Precision::kSingle, {
+ { // Intel CPUs
+ kDeviceTypeCPU, "Intel", {
+ { "Intel(R) Core(TM) i5-6200U CPU @ 2.30GHz", { {"WGS1",128}, {"WGS2",2}, {"WPT",4} } },
+ { "default", { {"WGS1",128}, {"WGS2",2}, {"WPT",4} } },
+ }
+ },
+ { // Default
+ kDeviceTypeAll, "default", {
+ { "default", { {"WGS1",128}, {"WGS2",2}, {"WPT",4} } },
+ }
+ },
+ }
+};
+
+// =================================================================================================
+
+const Database::DatabaseEntry Database::XgerComplexSingle = {
+ "Xger", Precision::kComplexSingle, {
+ { // Intel CPUs
+ kDeviceTypeCPU, "Intel", {
+ { "Intel(R) Core(TM) i5-6200U CPU @ 2.30GHz", { {"WGS1",512}, {"WGS2",8}, {"WPT",2} } },
+ { "default", { {"WGS1",512}, {"WGS2",8}, {"WPT",2} } },
+ }
+ },
+ { // Default
+ kDeviceTypeAll, "default", {
+ { "default", { {"WGS1",512}, {"WGS2",8}, {"WPT",2} } },
+ }
+ },
+ }
+};
+
+// =================================================================================================
+
+const Database::DatabaseEntry Database::XgerDouble = {
+ "Xger", Precision::kDouble, {
+ { // Intel CPUs
+ kDeviceTypeCPU, "Intel", {
+ { "Intel(R) Core(TM) i5-6200U CPU @ 2.30GHz", { {"WGS1",512}, {"WGS2",16}, {"WPT",1} } },
+ { "default", { {"WGS1",512}, {"WGS2",16}, {"WPT",1} } },
+ }
+ },
+ { // Default
+ kDeviceTypeAll, "default", {
+ { "default", { {"WGS1",512}, {"WGS2",16}, {"WPT",1} } },
+ }
+ },
+ }
+};
+
+// =================================================================================================
+
+const Database::DatabaseEntry Database::XgerComplexDouble = {
+ "Xger", Precision::kComplexDouble, {
+ { // Intel CPUs
+ kDeviceTypeCPU, "Intel", {
+ { "Intel(R) Core(TM) i5-6200U CPU @ 2.30GHz", { {"WGS1",512}, {"WGS2",1}, {"WPT",1} } },
+ { "default", { {"WGS1",512}, {"WGS2",1}, {"WPT",1} } },
+ }
+ },
+ { // Default
+ kDeviceTypeAll, "default", {
+ { "default", { {"WGS1",512}, {"WGS2",1}, {"WPT",1} } },
+ }
+ },
+ }
+};
+
+// =================================================================================================
+} // namespace clblast