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authorCedric Nugteren <web@cedricnugteren.nl>2023-01-21 21:13:49 +0100
committerCedric Nugteren <web@cedricnugteren.nl>2023-01-21 21:13:49 +0100
commitc9856758b3c83c53a1185f848f23b55de1c9a2cc (patch)
tree369b50d015c70a02cfcec5ef16b0a8d0112342c1 /src/database/kernels/xdot
parentf4a14daf8d1e0f980f9532669647eadb91cdad65 (diff)
Add tuning results for Intel FPGA emulation device
Diffstat (limited to 'src/database/kernels/xdot')
-rw-r--r--src/database/kernels/xdot/xdot_32.hpp8
-rw-r--r--src/database/kernels/xdot/xdot_3232.hpp8
2 files changed, 16 insertions, 0 deletions
diff --git a/src/database/kernels/xdot/xdot_32.hpp b/src/database/kernels/xdot/xdot_32.hpp
index 394dce19..a793f869 100644
--- a/src/database/kernels/xdot/xdot_32.hpp
+++ b/src/database/kernels/xdot/xdot_32.hpp
@@ -107,6 +107,14 @@ const DatabaseEntry XdotSingle = {
} },
}
},
+ { // Intel accelerators
+ kDeviceTypeAccelerator, "Intel", {
+ { "default", {
+ { Name{"Intel(R) FPGA Emulation Device "}, Params{ 1024, 128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+ { kDeviceNameDefault , Params{ 1024, 128, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+ } },
+ }
+ },
{ // NVIDIA GPUs
kDeviceTypeGPU, "NVIDIA", {
{ "SM2.0", {
diff --git a/src/database/kernels/xdot/xdot_3232.hpp b/src/database/kernels/xdot/xdot_3232.hpp
index 03c4b8ed..06d8190e 100644
--- a/src/database/kernels/xdot/xdot_3232.hpp
+++ b/src/database/kernels/xdot/xdot_3232.hpp
@@ -105,6 +105,14 @@ const DatabaseEntry XdotComplexSingle = {
} },
}
},
+ { // Intel accelerators
+ kDeviceTypeAccelerator, "Intel", {
+ { "default", {
+ { Name{"Intel(R) FPGA Emulation Device "}, Params{ 1024, 256, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+ { kDeviceNameDefault , Params{ 1024, 256, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+ } },
+ }
+ },
{ // NVIDIA GPUs
kDeviceTypeGPU, "NVIDIA", {
{ "SM2.0", {